Global Sources
EE Times-India
 
EE Times-India > EDA/IP
 
 
EDA/IP  

Talus IC implementation tool gears for 20nm

Posted: 10 Dec 2010     Print Version  Bookmark and Share

Keywords:timing closure  extraction  SoC design  router  extractor 

Magma Design Automation Inc. unveils the Talus ver.1.2, a tool for routing, timing and extraction to aid SoC implementation. The company touts that the tool enables engineers to implement 1 million to 1.5 million cells per day on large designs of blocks of 2 million to 5 million cells.

Talus 1.2 integrates technologies including the company's MX Router, MX Timer, MX Extractor, Concurrent MMMC optimisation and Crosstalk avoidance. "The 'MX' portions are very much new technology and in particular leverage Magma's Tekton/QCP timer and extractor technology to provide simplified signoff flows and massive runtime improvements over Talus 1.1," explained Mark Richards, senior technical marketing manager with the Design Implementation business unit at Magma.

He added, "The concurrent MMMC was always there in Talus1.1 but the new MX architecture allows for at least 5X the competition in the number of scenarios (combinations of modes and corners) that can be handled in the implementation flow. Crosstalk avoidance was also very much part of the Talus1.1 flow but significant improvements have been made on the convergence of these flows in particular (but not limited) to address the increasing crosstalk challenges at 28nm and beyond."

Richards explained that with Talus 1.2 massive MMMC capacity and high throughput, optimising for and meeting all critical metrics becomes far easier for designers and for any target application. However, he said the stands out of the products are:

 • Meeting timing and yet still achieving challenging leakage and dynamic power targets is made easier with a full view across all of the modes and corners that the device will have to operate in. Being able to optimise across the entire PVT space at once ensures that there is no need for punitive margins that are otherwise employed when this view of the problem is not afforded to the tool.

 • Having the ability to get to full signoff accuracy inside the implementation tool means that time consuming and potentially disruptive timing closure ECOs are reduced or even eliminated.

 • Having a fully integrated place-and-route optimisation environment that all optimise using the same underlying cost algorithms ensures that early timing views are maintained throughout the flow thus ensuring that early block estimates are valid and can be counted on when integrated into the top level.

According to Richards, Magma has worked with many early adopters to enable them to ready their flows for 28nm or to provide them with the capacity and throughput required to meet their schedules. More specifically, Talus Vortex has been used on at least five tape-outs at 28nm and many top tier customers now have Magma as plan of record (POR) for their production designs at the 28nm node.

- With inputs from Anne-Françoise Pele
  EE Times

Find related content:
  - more products
  - technical papers
  - company/industry news





Comment on "Talus IC implementation tool gears f..."
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
 
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

 

Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut

 
Back to Top