Global Sources
EE Times-India
 
EE Times-India > EDA/IP
 
 
EDA/IP  

Start-up delivers post-silicon debug tool

Posted: 09 Nov 2010     Print Version  Bookmark and Share

Keywords:debug  validation  start-up 

An EDA company called Veridae Systems Inc. has spun out of research done at the University of British Columbia promising to deliver breakthrough technology for post-silicon debug and validation.

The company said its technology provides improved visibility into the IC at all stages of validation, letting design engineers pinpoint and understand unexpected behaviours, correct problems and rapidly move devices into production. Debugging problems that used to take weeks or even months to resolve can now be fixed in hours.

The company's flagship product is the Clarus Post-Silicon Validation Suite, a silicon debug toolkit that provides visibility into the operation of complex SoCs, FPGAs and ASICs, according to the company. Clarus provides simulation-style visibility into device behaviour throughout the design cycle, from initial single- and multi-FPGA prototypes through IC production, according to the company. Clarus can help designers to avoid re-spins and can reduce the overall development time by 10 to 30 per cent, the company said.

Veridae is led by Jim Derbyshire as chairman and CEO. The company's technology evolved from research at UBC done by Brad Quinton, now the chief technology officer of Veridae.

Quinton said Veridae's technology addresses the rising complexity of semiconductors. ICs are becoming both more complex and are operating at faster speeds—a combination that has pushed the limits of conventional debug solutions, he said. Up to 50 per cent of the overall development time of complex ICs is now consumed between the arrival of initial prototypes and the final production release, Quinton said.

Because of the technology's potential to address one of chip companies' biggest pain points—the validation process—Veridae has found some initial interest, Quinton said. "We are finding a receptive audience," Quinton said.

Quinton noted that the environment for EDA start-ups is very different than it was a few years ago, primarily because venture capital has dried up considerably in the past two years. "The easy old days of raising a couple million dollars with a Powerpoint slide are gone for now," Quinton said.

But Quinton said advances on some fronts have actually made it easier and less costly for an EDA start-up to get rolling. Many of the pieces needed to develop an EDA product are more available and less costly than they were previously, he said. For example, Veridae used standard software platform from vendor Verific Design Automation Inc. as the backbone for its tool suite, he said.

"It just changes the model, where you don't need Rs.46.70 crore ($10 million), you can do angel investment and different types of target investments" to get started, Quinton said.

The Clarus Suite is available now. Pricing information was not disclosed. In addition to the software suite, Veridae said it also offers on-site debug design support services.

- Dylan McGrath
EE Times

Find related content:
  - company/industry news
  - new products
  - technical papers





Comment on "Start-up delivers post-silicon debug..."
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
 
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

 

Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut

 
Back to Top