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Opinion: e-beam critical to semiconductor manufacturing

Posted: 23 Sep 2010     Print Version  Bookmark and Share

Keywords:e-beam lithography  wafer  photomask  EUV  nano-imprint 

D2S Inc. CEO Aki Fujimura discusses the role of electron beam lithography in the future of semiconductor manufacturing and is of the opinion that all leading-edge designs will require e-beam technology.

Electron beam (e-beam) lithography is becoming increasingly more critical to semiconductor manufacturing. Not only is e-beam lithography essential for the future of direct-write applications for wafers, but also for all precision photomasks that will continue to be written by e-beam. In addition, extreme ultraviolet (EUV) lithography masks as well as nano-imprint masks will also be written by e-beam. In other words, no matter which lithography approach is used to write wafers, all leading-edge designs will require e-beam technology. Yet, the amount of investment in e-beam technologies around the globe is lacking as compared to those in other semiconductor technologies. However, a recent development in design-for-e-beam (DFEB) mask technology demonstrates how an investment across the supply chain in e-beam technology can significantly increase options for the economical production of semiconductors at future geometries.

E-beam lithography represents a trade-off of accuracy and write times. E-beam is inherently more accurate and precise at writing nanometre-level features as compared to light. In addition, 50KV e-beams are excellent at depth of focus, making them a superior choice for drilling holes. However, when writing wafers, e-beam-based direct-write takes much longer than mask-based writing using light. On the other hand, for e-beam-based mask writing, the trade-off is between the quality of the wafers produced and the write times of the masks needed to produce those wafers.

At 22nm logic nodes (32nm half pitch), the wafer manufacturing for system-on-chips (SOCs) will need to rely on 193nm immersion lithography. EUV lithography will not be economically or operationally practical for all but the highest volume designs. E-beam direct-write and nano-imprint technologies provide maskless alternatives for low-volume production, but are not fast enough for mass production.

The problem with 22nm volume production printing with 193nm immersion is that the features are so small that complex shapes will be required on the mask in order to produce adequate wafer yield. These complex shapes cause the mask write times to explode, making the mask costs unacceptable. Going the other way, the mask shop's concern for the mask write times forces a constraint on the incoming mask shapes to be less complex. This constraint forces the optical proximity correction (OPC), inverse lithography technology, computational lithography, and/or source mask optimisation solutions to be limited to "Manhattanized" solutions where the shapes consist of horizontal or vertical rectangles only. The basic engineering assumption to use only non-overlapping rectangles built into today's CAD and lithographic systems is at the heart of the problem.


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