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Development tools key to SoC implementation

Posted: 04 Aug 2010     Print Version  Bookmark and Share

Keywords:SoC implementation  development tools  application tools 

Customers need chips, tools and software that match the specific needs of their application. In addition, they need everything to be simple to design into a product, easy to program efficiently, ultra-low power and ultra-low cost, available early in the end-product's preferred life-cycle and broadly supported by third parties. In 2020, I expect customer requirements to stay pretty much the same, but the underlying technology and how we develop it will be vastly different and far more complex than what we provide now.

From a hardware perspective, these future SoCs will bring multiple DSP and GPP cores together with custom hardware accelerators into a heterogeneous architecture loosely coupled with an asynchronous interconnect. In addition, these devices will have a non-uniform memory architecture and be designed for ultra low-power consumption.

Designing such complex architectures from scratch will no longer be feasible, both from a cost and time-to-market standpoint. Instead, devices will be designed using an iterative approach that relies on reconfigurable system modelling tools, such as G3-type compilation tools that support a rapid design methodology. Specifically, the topology of the SoC will be tunable according to the particular application domain at the individual processor node and memory sub-system level. The chief advantage of this approach is that it leads to completed SoC designs in months, not years.

View the PDF document for more information.





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