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Will configurable memristors phase out CPUs?

Posted: 13 Apr 2010     Print Version  Bookmark and Share

Keywords:memristor  CPU  memory  Moore's Law 

Hewlett-Packard has demonstrated memristors in an architecture that can be dynamically changed between logic operations and memory storage. The architecture makes memristors a candidate for extending Moore's Law beyond the end of the International Technology Roadmap for Semiconductors (ITRS), circa 2020, according to HP. The ITRS has called for a new state variable besides charge or voltage to represent bits, and HP claims that the variable "resistance" employed by its stateful logic circuitry fills the bill.

The configurable architecture demonstrates "stateful logic" that HP claims could someday obsolete the dedicated CPU by enabling dynamically changing circuits to maintain a constant memory of their state. That would let them be powered down at any time without the need to reboot at start-up.

In its demonstration, HP showed that memristive devices could use stateful logic to perform material implication—a "complete" operator that can be interconnected to create any logical operation, much as early supercomputers were made from NAND gates. Bertrand Russell espoused material implication in Principia Mathematica, the seminal primer on logic he co-authored with Alfred Whitehead, but until now engineers have largely ignored the concept.

HP realised the material implication gate with one regular resistor connected to two memristive devices used as digital switches (low resistance for "on" and high resistance for "off"). By using three memristors, HP could have realised a NAND gate and thus re-created the conditions under which earlier supercomputers were conceived. But HP claims that material implication is better than NAND for memristive devices, because material implication gates can be cast in an architecture that uses them as either memory or logic, enabling a device whose function can be dynamically changed.

Memristor innovator Stan Williams, a senior HP fellow and director of its Information and Quantum Systems Lab, claims that dynamically changing memristors between memory and logic operations constitutes a new computing paradigm "enabling calculations to be performed in the same chips where data is stored, rather than in a specialised central processing unit."

HP revealed that it had designed the architecture to allow multiple layers of memristive stateful logic to be stacked, for a tenfold increase in memory density in devices that would also be able to perform repetitive logic operations on the stored data. Those operations might range form multi-media tasks, such as movie rendering, to scientific operations like genomic algorithms.

- R. Colin Johnson
EE Times





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