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12bit ADC doubles effective bandwidth

Posted: 30 Oct 2009     Print Version  Bookmark and Share

Keywords:ADC  receiver  digitiser  analogue front-end 

ADS5400 ADC

Texas Instruments unveils an ADC that combines 12bits of resolution with a 1GSps sampling rate that effectively doubling the amount of signal bandwidth that can be captured in a single ADC. The ADS5400 delivers signal-to-noise ratio (SNR) of 59dBFS and 75dBc spurious-free dynamic range in first Nyquist, and 58dBFS SNR and 70dBc SFDR performance for intermediate frequencies beyond 1,000MHz. A fully buffered analogue input isolates the onboard sample and holds internal switching to prevent disturbing the signal source, while providing a high-impedance input. The ADS5400's performance enables smaller, higher-performance and higher-density wide-bandwidth receivers and digitisers.

"The ADS5400 has enabled our latest modular component, the QuiXilica Atlas-V5 VXS board, to handle 12GBps of data and generate a real-time result," comments Andrew Reddig, president and chief technology officer of Tekmicro. "Our launch customers are using the Atlas to create higher performance solutions for critical applications that were unachievable with previous A/D technology."

"Customers can use the ADS5400's ground-breaking combination of resolution, sample rate and bandwidth to significantly enhance applications in defence by improving radar and signal intelligence capabilities, and can double the capture bandwidth of signals with 12bit resolution in test and measurement," said Art George, senior VP of TI's high-performance analogue business unit.

Developed on TI's high-speed, proprietary BiCom3 complementary bipolar SiGe technology, the monolithic ADS5400 is specified over the full industrial temperature range (-40°C to 85°C. The BiCom3 technology's silicon-on-insulator process makes it well-suited for high-temperature and high-radiation environments.

The ADC's buffered analogue input provides constant input impedance across time and frequency and eliminates sample-and-hold kickback, simplifying input matching for passive and active analogue front-end. It allows adjustable fine gain, offset and phase ease the interleaving of two or more ADCs to create a multi-GSps digitiser, or the balancing of two ADCs in an I/Q receiver. Thermally-enhanced, the 100-pin TQFP (16mm x 16mm footprint) package touts an exposed thermal pad. Plus user-selectable single- or dual-bus DDR LVDS outputs provide designers flexibility to choose between I/O speed and pin-count.

Customers can also speed time-to-market with compatible TI devices: THS9000 and THS9001 amplifiers to support input frequencies up to 500MHz; the CDCE72010 high-performance, low-phase noise and low-skew clock; the DAC5682Z dual, 16bit, 1GSps DAC; the TPS727xx and TPS717xx low dropout regulators; and the TMS320C6474 and TMS320C6457 DSPs.

The ADS5400 is available now in a 100-pin TQFP package and is priced at Rs.37,831.95 ($775) in 100-unit quantities. An EVM is available for Rs.63,411.23 ($1,299) and is compatible to TI's TSW1200EVM digital capture card, offering a flexible evaluation environment for ADC analysis.





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