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EDA/IP  

Rise-time accelerator IC for 2-wire bus apps

Posted: 16 Jun 2009     Print Version  Bookmark and Share

Keywords:MAX3373  rise time  accelerator circuit 

Applications that include a 2-wire bus—such as I²C or SMBus—necessitate trade-offs between rise time, power consumption and noise immunity. Because the rise time for low-to-high transitions on such open-drain buses is determined by pull-up resistors and bus capacitance, it is difficult to maintain clean, fast edges as you add peripherals, routing traces and connectors. To address these rise-time problems, this application note presents a rise-time accelerator circuit that offers a simple way to speed rise time, improve noise immunity and minimise power dissipation.

View the PDF document for more information.





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