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Synopsys launches IC Validator

Posted: 13 May 2009     Print Version  Bookmark and Share

Keywords:qualification program  design rule checking  IC design  signoff 

Synopsys, Inc. has announced its IC Validator is production ready and has been fully qualified by TSMC for the company's EDA qualification program of design rule checking/layout verification signoff (DRC/LVS) starting from 28nm.

Normally, physical IC design approaches result in multiple iterations between design and signoff. At leading-edge nodes this "implement-then-verify" approach can be slow and may complicate convergence as layout corrections can alter design objectives such as area, timing, and power.

In contrast, "in-design physical verification" schemes the full physical verification constraints is brought into the design phase, helping to ensure clean layout upon leaving the design environment and avoiding late-stage surprises close to tape-out.

With in-design verification, specific errors and selected areas of layout can be targeted incrementally, providing a speed-up in overall design completion time.

Today, the IC Validator DRC/LVS is ready for in-design physical verification and signoff for advanced designs at 45nm and below.

IC Validator can automatically discover and fix design rule violations within the global context of the design. Operations typically performed during physical verification, such as metal fills, may trigger additional design changes to achieve timing closure.

Together with Synopsys' IC Compiler, IC Validator's in-design flow reduces such iterations by performing signoff-quality, timing-driven metal fill during the design phase. Nvidia has adopted IC Validator for validating multi-billion transistor graphics processors and claim they have achieved near-linear scalability, such as the 20x accelerated time to tape-out speed-up using 25 CPUs.

"IC Validator demonstrated that we can verify our largest designs overnight using our standard hardware configurations," said James Chen, manager of VLSI technology at Nvidia, in a statement.

"Nvidia's adoption of IC Validator is a significant endorsement of its benefits and Synopsys' technology addressing the requirements for the industry's most advanced designs," said Antun Domic, senior vice president and general manager, Implementation Group at Synopsys.

-Nicolas Mokhoff
EDA DesignLine





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