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Analysis: Plug-and-play IP goal still elusive

Posted: 11 Feb 2009     Print Version  Bookmark and Share

Keywords:IP core  IP selection  IP blocks 

Intellectual property (IP) was a hot topic at the DesignCon 2009, with frustration over the quality of IP and business models that are described as immature being knocked more than once. Users continue to complain of the lack of standards and effective quality metrics that they say would help greatly in confidently selecting IP. Some have the opinion that the only way to be truly successful in selecting and implementing IP is through deep vendor-customer collaboration.

During a panel discussion on IP selection, an audience member voiced the observation that chips are like the printed circuit boards of yesteryear, with IP cores acting in the role once occupied by standard components. He likened stitching together a SoC using several IP blocks to slapping components onto a PC board to build a system.

But several audience members disagreed, noting that, among other things, standard components can be evaluated by datasheets and performance benchmarking that describe exactly what each device will do. For the most part, the IP business still offers nothing comparable.

Gabriele Saucier, a co-founder of the web portal of IP information, Design and Reuse, said it was a folly to compare the quality of one IP core with another and that the attributes of an IP core could not be captured in a datasheet like those of a standard electronic component. An IP core, she said, is not designed to work independent of the rest of a design.

Saucier expounded on what she sees as the differences between plug-and-play components and IP blocks. Other panellists joined in, making statements that seemed to fly in the face of what some have considered the Holy Grail for IP—the idea that a chip can be easily assembled by stitching together IP blocks from multiple third-party vendors and adding in a few differentiating elements.

Several members of the audience seemed taken aback. One could be overheard saying, somewhat angrily, "That is exactly how IP is supposed to work."

The idea of plug-and-play IP is the goal for most in the industry, said Kalar Rajendiran, senior director of marketing at eSilicon Corp. "We haven't gone there, and I don't know if we will ever get there," said Rajendiran, a member of the selecting IP panel, in a subsequent interview with EE Times. "Things are coming from different companies and work differently together."

Part of the problem—and the source for much of the disconnect between what users want and what suppliers can deliver—is the nature of IP blocks themselves; they are intended to be implemented in a larger design and do not work independently.

The comparison between standard components and IP blocks breaks down because while a working component can be evaluated, specified and benchmarked independently, the performance of an IP block can't adequately be measured until it is woven into a design and implemented into silicon.

Even then, according to Rajendiran, the performance of a particular block of IP cannot really be measured because it is dependent upon a host of factors, including its proximity to other elements and other IP blocks.

This interdependence creates its own set of challenging questions. Chief among them is this: when a chip fails, who is at fault? Can the failure be blamed on one particular third-party IP block? Does the fault lie with the IP core itself, the way it was implemented, or, possibly, manufacturing process variability? These questions, IP vendors and users say, are often difficult—if not impossible—to answer.


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