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Optimising architecture-oriented C, Part 2

Posted: 03 Feb 2009     Print Version  Bookmark and Share

Keywords:loop mechanisms  memory  hardware 

Part 1 of this series looks at architecture-oriented C optimisation. It shows how C optimisations can take advantage of zero overhead loop mechanisms, hardware saturation, modulo registers, and more. This part looks at optimising C to account for memory alignment, cache features, endianness, and application specific instructions.

Architectures may allow or disallow unaligned memory access. While no special guidelines are required when unaligned memory access is allowed, if disallowed, the programmer must be careful. Ignoring alignment considerations causes severe performance issues and even malfunctions. To avoid malfunctions, all memory accesses need to be executed with the proper alignment. To improve performance, the compiler needs to be aware of the alignment of pointers and arrays in the program.

View the PDF document for more information.





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