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EDA/IP  

Software verification, debug in the MPSoC era

Posted: 12 Jun 2007     Print Version  Bookmark and Share

Keywords:MPSoC  software verification  parallelism 

Increased parallelism with more processor cores per chip is the hardware solution for the demands of feature-rich consumer devices; however it substantially increases the challenges on the software side to stay in step with process technology shifts.

The eventual solution will be a paradigm shift in the abstraction on the software side much like hardware design moved from gates to RTL. Yet in the path to this new way of designing software/hardware systems, designers will face legacy software on complex MPSoC.

This will be compounded as the verification of sequential software has never been an easy task, but the challenges of software parallelism and multiple processors will make software verification more difficult. As a result a new breed of programming and debug solutions will be required, helping programmers to deal with the specific software verification challenges in MPSoC.

View the PDF document for more information.





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