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Implementing DDR2 PCB layout on the TMS320DM646x

Posted: 30 Jul 2008     Print Version  Bookmark and Share

Keywords:DDR2  memory controller  DSP  PCB 

This article discusses implementation instructions for the DDR2 memory controller interface contained in the TMS320DM646x DSP devices. The approach to specifying interface timing for the DDR2 interface is quite different than on previous approaches where it specified device timing in terms of data sheet specifications and simulation models. TI has performed the simulation and system design work to ensure DDR2 interface timings are met.

The approach for the interface and the DDR2 system solution will be further discussed in the article.

View the PDF document for more information.





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