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Processors/DSPs  

Multi-threaded design tackles SoC performance bottlenecks (1)

Posted: 22 Dec 2006     Print Version  Bookmark and Share

Keywords:multi-threading processor  processor core  SoC 

Data bottleneck issues provide major architectural challenges for the core CPU designers and require careful attention to CPU interaction with the SoC bus, otherwise system latency may be unpredictable-a significant problem for real-time system developers. Here's how a multi-threading processor core tackles both the CPU efficiency and the bus latency bottlenecks in a driver-assistance/vision/navigation system SoC design.

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