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Memory tester solves DDR3-SDRAM challenges

Posted: 13 May 2008     Print Version  Bookmark and Share

Keywords:memory test system  DD3-SDRAM 

Advantest Corp. touts its T5503 memory test system as having the industry's highest parallel test capability of up to 128 devices.

The T5503 was developed specifically to address the challenges of high-volume production test of next-generation DDR3-SDRAM. The memory tester will be available from August and will also be on display at the "Advantest Tour de Force 2008" exhibition to be held at the Tokyo International Forum from June 3-5.

The T5503 enables package test of up to 128 DDR3-SDRAM devices simultaneously, double of the company's previous models, allowing for a major reduction in test costs for high volume production lines. With maximum test speeds of 3.2Gbps and data transmission speeds of more than 1Gbps, the T5503 is suited for high-volume production testing of DDR3-SDRAM, as well as for GDDR3 and GDDR4.

The tester's semiconductor circuitry makes full use of the latest CMOS technology to achieve greater packaging density. Reducing the footprint by approximately 40 per cent over the previous model, it also leads to space savings in high-volume production lines. Power consumption has also been reduced by approximately 45 per cent compared to the system's predecessor, enabling environmentally friendly operation.

Advantest's proprietary multi-strobe capabilities, introduced in the company's previous model, T5501, have also been further enhanced in the T5503. The system provides high-speed and high-precision test, as it supports source-synchronous test with the use of multi-strobe technology that measures the phase difference between data output from the device and the reference clock signal at each clock cycle.

- Ismini Scouras
eeProductCenter





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