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Schedule delays hound SoC design

Posted: 01 May 2008     Print Version  Bookmark and Share

Keywords:SoC design delay  IC development  semiconductor  ERP 

No prudent chip company would admit as much to customers, but the unspoken truth in today's complex world of SoC design is that most ICs will neither be developed nor delivered on time. In fact, 89 per cent of IC development projects experience design delays, according to Ron Collett, president and CEO at Numetrics Management Systems Inc.

Consulting firm Accenture reports a similar trend, citing a range of schedule delays from as little as 3 per cent to as much as 30 per cent in IC development.

According to Scott Grant, senior executive with Accenture's semiconductor business practice, if the IC in question is a lead, first-generation product—that is, a new chip requiring a new design—it will typically register an additional 15-30 per cent delay in the design schedule, compared with a less-complex second, third, fourth or fifth spin of an existing product.

No customer would knowingly tolerate such delays. Nor could a reputable chip manufacturer intentionally budget such chronic overruns, especially with the cost of IC development skyrocketing. Schedule slips in IC development often result in a semiconductor company's missing an entire product cycle, losing prized design wins and triggering dangerous financial reverses.

Solution in software
Numetrics is providing enterprise resource planning (ERP) software tools designed to calculate chip design complexity, quantify scheduled risk and estimate schedules and staffing requirements. While conventional ERP tools from Oracle, SAP or Siebel are used in managing sales, manufacturing and general and administrative functions in an enterprise, none have existed thus far for semiconductor R&D organisations.

According to Numetrics data, schedule slips for IC development vary, but they average 44 per cent.

The reasons managers and designers cite for such delays range from "the intellectual property core was late" and "EDA tools are inadequate" to "a key manager left the organisation" and "specs have changed." Collett calls them "the usual suspects" of excuses.

But the crux of the issue is unpredictability.

"You can't predict how challenging new functional-unit blocks in a chip will be and how complex the integration will be," said Grant. "In many of these first-generation products, we have no way, even with historical data, to gauge what the newness factor is."

Taming that unpredictability is where Numetrics hopes to cash in.

Instead of dealing with a variety of individual causes for delays, Numetrics' ERP software aims to look at the big picture. Collett developed the tool suite by leveraging the huge database the company has amassed since 2000 in the course of offering chip vendors services such as benchmarking IC development projects and measuring productivity against competitors.

Collett believes IC development can be modelled as "a stochastic process," if adequate statistical data is available.

Variables introduced in such a process include the technical effects of shrinking die size and yields, a semiconductor R&D team's historical capabilities and tooling, and the impact of ever-expanding development teams that are often geographically far-flung. By pinning down such variables, "we can bring randomness into the model," Collett explained.

Costly delays
Long delays are common in IC development, even among experienced chip vendors with ample engineering resources. For a high-profile example, one need look no further than an erstwhile IPTV chip development partnership launched in 2004 between Microsoft Corp. and STMicroelectronics.

In looking for an innovative one-chip multimedia processor as a single hardware platform on which to develop its IPTV software, Microsoft settled on ST as its primary silicon vendor. But by November 2004, when Microsoft nabbed a $400 million IPTV deal from AT&T (then SBC Communications), ST was experiencing a substantial delay in its promised IC development.

Within weeks, ST lost Microsoft's confidence. It was unseated by Sigma Design Inc., which in early 2005 became Microsoft's primary prototype partner—a failure that cost ST dearly. Today, Sigma Design has a 100-per cent lock on Microsoft's growing IPTV design sockets.

Enterprise management tools come to the rescue: Guide decision-making process for IC development.

Thomas Wille, senior director of innovation and technology in business line identification at NXP Semiconductors, acknowledged that around the same time, his group was also "having trouble in getting products out."

In 2004, the average product delay was as high as 40-50 per cent. For the identification group, with an 80 per cent market share in government projects such as national ID cards and electronic passports, this across-the-board slippage was unacceptable.

'Resource dilution'
When asked why such slippage happens, Wille said, "First, we tend to underestimate the complexity of a chip—especially when it is a brand-new product. Second, we tend to understaff the project." Particularly if the project runs more than one year, a "resource dilution" begins to take place, he said. "As the project gets prolonged, things happen here and there, people get distracted, they are pulled into different projects to help out others."

Indeed, most semiconductor R&D teams handle multiple IC development projects. "There is usually a portfolio of projects to manage in parallel," said Benoit Calimez, programme manager for business line car entertainment solutions at NXP.

Taking on a new project is hard enough, he said, but simultaneously sustaining products that are supposed to be phased out but are still hanging fire further complicates project management.

Most chip companies tend to determine the schedule and resource requirements of a new IC project essentially by hunch. "We relied upon experts within the project or sometimes brought in experts from other projects at NXP who were regarded for their competence," said Calimez.

But in complex chip development, aligning the expectations of executive management, marketing and chip architects in the R&D organisation is one of the hardest things for an organisation to pull off. While the marketing department tends to want everything, executive management often limits resources and the R&D team ends up overcommitting.

Productivity vs. team size: Development productivity equals the industry norm project effort divided by the actual effort expended.

For executives, too
Numetrics has signed a multi-million-dollar, multi-year corporate-wide agreement with NXP Semiconductors for its ERP offering.

"We'd like to think our tools are not only a friend of engineering teams, but also a friend of executive teams," Collett said.

- Junko Yoshida
EE Times





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