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Sensor, processing at heart of DSLR

Posted: 04 Oct 2007     Print Version  Bookmark and Share

Keywords:SLR cameras  CMOS  image sensor 

Digital SLR cameras have improved drastically in performance over the past year alone, with 8-megapixel cameras now commonplace and at reasonable prices. That said, all such cameras remain constrained by a well-defined optical format and lens design base, the physical geometry of the camera and, of course, cost. Add to that the exponential cost associated with scaling CMOS sensors to reach the size of 35-mm film, and therein lies a problem: Camera manufacturers are forced to trade resolution for the noise associated with shrinking pixel size.

Enter the Foveon X3 14.1-Mpixel image sensor. X3 image sensors have three layers of vertically stacked pixels. The layers are embedded in silicon to take advantage of the fact that red, green and blue light penetrate silicon to different depths, allowing it to show full colour at every point on the captured image, vs. the interpolation of RGB pixels in a typical array. "The big advantage is that we can do more per unit area," said Richard Turner, vice president of marketing for Foveon (San Jose, Calif.). It also has all the advantages of being CMOS, instead of CCD.

In addition, there are less-quantifiable advantages to the images taken with an X3 sensor, said Turner. These are attributable to the brain's ability to pick up intricate colour images and create a perceptual response. This, in turn, is what gives X3 images more "pop" and vibrancy, he said.

It was these features that encouraged Sigma to select the 14.1-Mpixel X3 sensor for its advanced Sigma SD14 DSLR, a $1,600 camera built upon its SD9 and SD10 predecessors and which has gotten very positive reviews to date.

While some say the Foveon requires more processing than other sensors, Turner said that while it does require different processing, it doesn't need intensive colour interpolation processing, "so it's a wash."

In any case, with 14.1 Mpixels, high-performance processing at low power is critical. To this end, Sigma selected the 600-MHz, 2400 MACs, ADSP BF561 from Analog Devices Inc.(Norwood, Mass.). This is supported by a Xilinx Spartan-3 XC3S200, a 200-Kgate FPGA optimised for low cost. Between the sensor and the DSP is an AD9228 quad, 12-bit, 40/65-Msample/second analogue-to-digital converter with an on-chip sample-and-hold circuit. Turner said the AD9228 is needed to handle the three 12-bit streams coming off the sensor—in parallel. This compares with the 1-pixel, 12-bit-wide stream coming off a typical sensor.

(Click to view full image)

The main processing board with the DSP and FPGA is supported by four banks of 512-Mbit SDRAM chips from Samsung (K4S511632D-UC75). Next comes the main control board, at the heart of which is the MegaChips DSC-3H, which integrates all the main digital camera functions, from I/O and sensor communication to JPEG image processing.

Also residing on the main board are two banks of Samsung K4S561632H-UC75 256-Mbit SDRAM. This provides buffering for shuffling data about and for burst-transfer operations to interfaces such as the flash card, the slot for which is also on this board. There is also a 64-Mbit NOR flash (Toshiba TC58FVM6B5BTG65, 48-TSOP). The 2.5-in. image display is via a Casio LCD.

Patrick Mannion
Editor-in-chief of TechOnline.com





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