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FPGA-based acceleration solution interfaces with Intel FSB

Posted: 21 Nov 2007     Print Version  Bookmark and Share

Keywords:commercial licensing  FPGA-based acceleration solution  Intel Front Side Bus 

Xilinx, Inc. has begun commercial licensing of the high-performance computing industry's first FPGA-based acceleration solution to interface with the Intel Front Side Bus (FSB). Enabled by the high-performance 65nm Virtex-5 platform FPGA and Intel QuickAssist Technology, the Xilinx Accelerated Computing Platform (ACP) M1 licensing package supports implementations capable of full 1066MHz FSB performance. The ACP M1 licensing package is available today to system integrators for developing solutions that accelerate the performance of Intel processor-based server platforms while minimising power consumption and total cost of ownership.

While power efficiency is a critical requirement in many of today's computing environments, it conflicts with the growing demand for higher raw performance and throughput. FPGA-based accelerators allow applications-such as option futures pricing in financial analytics, nucleotide sequence analysis in bioinformatics, and sub-surface structure imaging in oil and gas exploration-to achieve the highest possible performance while still maintaining power efficiency.

"High performance ACP modules help fuel the growing demand for FSB based accelerator solutions," said Lorie Wigle, director of Server Technology and Initiatives Marketing, Digital Enterprise Group, Intel Corporation. "Certain workloads in servers can benefit from closely coupled FPGA accelerators. With the Xilinx ACP M1, Intel QuickAssist technology and its Accelerator Abstraction layer, we expect our customers to benefit from a complete system solution."

Through a variety of initiatives under the banner of Intel QuickAssist Technology, Intel is supporting accelerator innovation targeting a variety of applications, markets and interconnects. For FPGA-based accelerators attached to the FSB, Intel developed the Intel QuickAssist Technology Accelerator Abstraction Layer (AAL), a consistent set of platform-level services for accelerators. The ACP licensing package includes a board reference design developed by Xilinx, FSB protocol IP jointly developed by Intel and Xilinx validated for 1066MHz operation, and the Intel QuickAssist AAL driver.

The Xilinx ACP M1 hardware reference design is pin compatible to an Intel Socket 604 Xeon processor and is targeted for the new Intel Xeon processor 7300 series multi-processor data center platform. With a 1066MHz FSB interface each Virtex-5 based ACP M1 module delivers 8.5GBps of system memory bandwidth. Featuring four independent 1066MHz FSB interfaces the 7300 data center platform delivers 34GBps of aggregate bandwidth which enables a variety of FPGA and Xeon processor configurations (1:3, 2:2, or 3:1 are supported) without compromising system throughput. To demonstrate performance, one Virtex-5 FPGA-based ACP M1 module has been shown to accelerate a BGM-based Monte Carlo financial analytics application by over 30x compared to a single processor software only solution while consuming less than 15W.

"ACP modules are ideal for accelerating the performance of computationally intensive workload computing," said Ivo Bolsens, Xilinx chief technology officer. "By leveraging the high-performance features of the Virtex-5 FPGA family, the ACP M1 supports transaction latencies of less than 120ns and can sustain burst transfers at full system speed. This performance enables platform developers to achieve superior application throughput without having to cluster multiple computers together or significantly increase their data center power consumption or total cost of ownership."

Nallatech Ltd will demonstrate the first commercial implementation of the ACP M1 package at the Super Computing 2007.




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