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USB 2.0 full- and Hi-Speed device controller debuts

Posted: 04 Oct 2007     Print Version  Bookmark and Share

Keywords:complete USB 2.0 device controller  soft IP core  FPGAs 

USB 2.0 Hi-/Full-Speed device
The USB 2.0 device controller consists of a soft IP core, software and class drivers, and Snap-On PHY daughtercards.

Altera Corp. has expanded its intellectual property portfolio with the introduction of a complete USB 2.0 Hi-/Full-Speed device controller solution from System Level Solutions (SLS). The solution consists of a soft IP core, software and class drivers, and SLS' Snap-On PHY daughtercards.

The daughtercards are designed for use exclusively with Altera development kits.

Full- and Hi-Speed USB device controllers are rapidly replacing older RS-232 ports in a variety of markets, such as consumer, medical, industrial, storage and leading-edge applications including automotive infotainment. According to Altera, the implementation of communication protocols in FPGAs is expanding as designers recognise the increased flexibility and upgrade possibilities offered.

The partner USB 2.0 product is packaged for installation as a component for the Altera SOPC Builder development tool. It features a core that is configurable for up to 16 endpoints with software and class drivers and hardware support for two PHY interfaces, including USB 2.0 Transceiver Macrocell Interface (UTMI) and UTMI+ Low Pin Interface (ULPI).

In addition to the physical deliverables of the partner core, SLS has ensured that the USB 2.0 device controller is protocol-compliant. By proactively achieving compliance and interoperability, SLS is delivering reduced risk to its licensees, the partners said.

Multiple versions of the SLS USB 2.0 solution are available, allowing designers to rapidly add the protocol flavour appropriate for their application. Designers that add USB 2.0 as an additional peripheral in their Nios II embedded processor-based designs can select the Avalon interface version of the core from within SOPC Builder. A FIFO interface version is also available.

Regardless of which version is chosen, system architects can download and evaluate a small, three-endpoint reference design for immediate design, simulation and programming of the combined development kit and PHY daughtercard even before the core is licensed.

Figure 7: The USB 2.0 device controller consists of a soft IP core, software and class drivers, and Snap-On PHY daughtercards.




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