Global Sources
EE Times-India
Stay in touch with EE Times India
 
EE Times-India > Interface
 
 
Interface  

Intel plans to introduce new interconnect architecture

Posted: 17 Sep 2007     Print Version  Bookmark and Share

Keywords:interconnect architecture  front-side bus  layered network fabric 

Intel Corp. reportedly plans to make major changes in its microprocessors via a new interconnect architecture that will replace its current front-side bus.

"In 2008/2009, Intel is expected to introduce the Common System Interface (CSI)," according to David Kanter, manager and editor of the Web site Real World Technologies. Intel has talked about CSI in the past, but the technology will become more important for the chip giant in the future.

On the site, Kanter describes CSI as a "family of interconnects that will transform Intel's entire high-performance product line. CSI will replace the existing front-side bus and can be compared to AMD's HyperTransport."

Kanter notes that "in 2004, AMD quickly gained market share with its Opteron processor, which capitalised on HyperTransport's superior system architecture and Intel's simultaneously weak product line." Intel "in 2006 responded with the popular Core 2 Duo," a move that "put significant pressure on AMD, especially in the server market, [but] Intel is still relying on a system architecture which lags AMD's HyperTransport in critical performance areas."

According to Kanter, CSI will enable integrated memory controllers and distributed shared memory. "CSI will be used as the internal fabric for almost all future Intel systems, starting with Tukwila, an Itanium processor, and Nehalem, an enhanced derivative of the Core microarchitecture, slated for 2008."

CSI taps a layered network fabric for communication among "agents," which according to Kanter may be "microprocessors, coprocessors, FPGAs, chip sets or generally any device with a CSI port." He predicts initial implementations in 65-nm and 45-nm CMOS will yield "12 to 16 GB/s of bandwidth in each direction and 24 to 32 GB/s for each link."

Mark LaPedus
EE Times




Comment on "Intel plans to introduce new interco..."
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
 
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

 

Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut

 
Back to Top