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EDA/IP  

Mentor, ASIC Architect jointly develop IP solutions

Posted: 12 Sep 2007     Print Version  Bookmark and Share

Keywords:PCIe controllers  bridge IP solutions  PCIe IP core 

Mentor Graphics Corp. and ASIC Architect Inc. partnered to develop PCIe controller and AMBA bridge IP solutions for the rapid and cost-effective integration into ASIC and SoC platforms.

Featuring a complete suite of PCIe controllers including X1 (1-lane), X2 (2-lane), X4 (4-lane), X8 (8-lane) and X16 (16-lane) options, the solutions also include AMBA 3 AXI and AMBA 2 AHB bridges to standard on-chip buses.

Mentor Graphics PCIe 1.1 controller and bridge IPs, based on ASIC Architect 's PCIe IP core, are fully compliant with the PCIe 1.1 specification. Designed for scalability, each controller is optimised for minimal gate count, low power and high performance, in configurations including Root Port, Switch Port, Endpoint or Dual Mode (Endpoint/Root). The Bridge IP cores enable high-performance interconnects of chips through PCIe bus. These IP solutions offer designers unprecedented turnaround time, flexibility, reliability and standard conformance, said Mentor Graphics.

"Responding to our customers who are targeting the high growth PCIe market, we partnered with ASIC Architect to deliver world-class IP solutions," said Bill Martin, Mentor Graphics general manager for intellectual property products, embedded systems division. "These leading PCIe controller and Bridge IP solutions from ASIC Architect expand our specification-compliant and high-performance IP portfolio and accelerate our IP subsystem strategy."




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