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Altera announces low-cost transceiver-based FPGA

Posted: 09 May 2007     Print Version  Bookmark and Share

Keywords:transceiver-based FPGA  Altera Arria GX 

Ali: The biggest challenge in developing these devices was balancing the features and the price.

With the unveiling of its latest transceiver-based FPGA family today, Altera Corp. claims it has succeeded in treading the thin line between feature set and price point.

The new Arria GX is a five-member series of "risk-free, low-cost, transceiver-based FPGA devices," according to Razak Mohammedali Ali, Altera's product marketing manager for Asia-Pacific. "The biggest challenge in developing these devices was balancing the features and the price."

The new FPGA series leverages the infrastructure and transceiver technology of Altera's higher-end Stratix II GX, but pared down the number of protocols supported to the three essentials—PCIe, GbE and RapidIO—resulting in devices that deliver the flexibility of more pricey FPGAs, at a cost that's closer to that of ASSPs, according Ali.

By focusing on the three mainstream protocols used in systems already shipping in volume today, the Arria GX series is particularly suitable for cost-sensitive, high-volume applications. They essentially fill the gap between fully flexible but costly transceiver FPGAs, and ASPPs that are low-cost but not programmable.

This middle-ground approach makes Arria GX an "excellent fit" for the volume-manufacturing-driven design environment in Asia, Ali said, "because they are cost-optimised and are targeting applications that are already shipping in volume."

The Arria GX series is comprised of five transceiver FPGAs with 21,580 to 90,220 logic elements and up to 4.5Mbits of memory and 12 transceivers. They support PCIe (x1 and x4), GbE and serial RapidIO (x1 and x4) at 1.25Gbps and 2.5Gbps data rates. Complementing these three protocols are parallel I/O bandwidths of up to 840Mbps LVDS and up to 33MHz DDR/DDR2. To optimise signal integrity, these devices come in flip-chip packages.

Altera provides an extensive suite development tools to ease high-speed designs using Arria GX FPGAs—Quartus II v.7.1, which includes the TimeQuest SDC-based timing analyser and the SOPC Builder; protocol-compliant IP core functions and reference designs; and, protocol-specific development kits.

Altera provides system-level support through its Regional Support Centres in North America, Europe and Asia. As with the Stratix II GX family, the Arria GX series is manufactured in the high-yielding 90nm technology of TSMC, Altera's long-time fab partner, assuring customers of steady supply.

Arria GX transceiver-based FPGA from Altera

The first production-qualified Arria GX devices will begin shipping in June. Prices start at Rs.2,113.49 ($50) for the 50,000-logic element model in 25,000-unit volume. All Arria GX devices will be shipping in production by September 2007. The Arria GX Development Kit is currently available for ordering through the company's online store.

Both the Subscription Edition and free Web Edition of Quartus II v. 7.1 are available for download. The annual software subscription is Rs.84,539.58 ($2,000) for a node-locked PC licence.

- Christine Telesforo
EE Times-Asia




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