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Reusable IP to accelerate ESL synthesis

Posted: 08 Feb 2007     Print Version  Bookmark and Share

Keywords:Reusable IP  IP blocks  RTL  Bluespec  ESL synthesis 

Claiming to set a new direction for silicon intellectual-property design and reuse, Bluespec Inc. this week will roll out the AzureIP Foundation Library, a set of parameterised IP blocks for use with the company's Bluespec Compiler. The library elements are intended to accelerate Bluespec's ESL synthesis environment.

Reusable IP has been part of RTL synthesis since the early 1990s, when Synopsys Inc. rolled out its DesignWare library. Bluespec's AzureIP library, however, brings the concept to an ESL synthesis tool that starts at a much higher level of abstraction and produces RTL code. It's available now for use with the SystemVerilog language; support for SystemC is to follow later this year.

Market need
"We clearly identified a market need between the high-level macro blocks and the low-level DesignWare components that accompany traditional synthesis tools," said Shiv Tasker, CEO of Bluespec. "If you find that people use certain functions over and over, you can make them a lot more productive if you do it once and ship it out."

The AzureIP library provides a selection of modules, data types and functions. They're built at the transaction level and compiled to RTL code in the Bluespec Compiler. AzureIP automatically generates the control logic that's required to integrate the IP into the design. The library elements can be parameterised for structure, function and type.

Major library categories include module connectivity and interconnects; storage with FIFOs and registers; fixed-point and complex math functions; aggregation with vectors and lists; finite state machine language for sequential, parallel, conditional and loop structures; multi-clock domain synchronisers; and utilities such as completion buffers.

Within each category are a number of functions. The aggregation library, for example, includes more than 125 individual functions, such as generating a vector of undefined elements, applying a function to a vector and reversing element order. "These are things engineers do routinely, and until now, each of them would have to be laboriously coded and verified," said Tasker. "Now, you can just pull one out of a library and use it." There's no sacrifice in design creativity, Tasker said. "You can modify them, edit them or write your own. Customers can add their own pieces of IP. There's nothing locked in."

AzureIP library compiles into RTL code

'Correct by design'
The AzureIP library elements are "composable," according to Bluespec. "When you connect two modules together, the connection is strongly typed and checked by the compiler, so you get the interface correct by connecting them together," said Charlie Hauck, Bluespec's VP of engineering. "The connections are correct by design."

It's because of this capability, Tasker said, that Bluespec can automatically generate the necessary control logic for the IP. "You don't have to write extra code to make it work," he said.

The IP will generate code ranging from a few gates to a few thousand gates, depending on the function. Tasker described the level of abstraction as "way above RTL" and "almost like the equivalent of a software subroutine library."

The AzureIP Foundation Library is available now with the Bluespec Compiler at no extra cost.

"What we're providing here is something that's new, different and fresh," Tasker said. "We identified a space in the market where there's a big gaping hole, and we're filling it with something really powerful."

- Richard Goering
EE Times




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