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Achieve accurate modelling using IBIS

Posted: 01 Feb 2007     Print Version  Bookmark and Share

Keywords:Mentor Graphics  Darshan Mehta  IBIS model validation  CMOS  model 

Today, engineers and designers are moving towards gigahertz-speed design. As lithography technology advances, CMOS gate size decreases dramatically, resulting in faster edge rate of the signal. At higher frequencies, the traces act like transmission line and all analogue effects, such as reflection and crosstalk, are seen in the design. Such makes signal integrity (SI) analysis a critical component of design.

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