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Faraday adds Ethernet PHY cores to IP portfolio

Posted: 26 Dec 2006     Print Version  Bookmark and Share

Keywords:Faraday Technology  Ethernet controller  Ethernet PHY cores  MAC digital IP  IEEE802.3z specification 

Faraday Technology Corp. has announced the availability of its licensable 10 /100/1000 Ethernet controller and 10/100 fast Ethernet PHY cores for UMC's 90nm, 0.13µm and 0.18µm processes. With thorough considerations for easy-integration, reusability, scalability and interoperability, Faraday's silicon-proven Ethernet solutions fulfil the increasing SoC integration demand from system companies and IC design houses to develop a wide range of Ethernet-enabled devices with less efforts and shorter lead time.

Faraday's Ethernet MAC digital IP provides AHB master capability and full compliance with IEEE802.3z specification for 10/100/1000Mbps Ethernet. With a DMA engine, this controller can reduce the CPU loading, maximise the system performance and minimise the FIFO size. Furthermore, Faraday's 10/100 Fast Ethernet PHYs with licensed Auto-MDIX technology, offer superior performance of immunity to noise and inter-symbol interference, featuring low power dissipation and small core size.

"As the market demand for Ethernet-enabled applications growing very quickly, we noticed that many customers have encountered issues that the existing stand-alone Ethernet chips can't solve. IC designers need to integrate the Ethernet function into one SoC device and get it manufactured in advanced process technologies," said Hsin Wang, Associate VP of IP Business and Technology at Faraday.

Faraday's 0.18µm ,and 0.13µm, Fast Ethernet PHYs and the 10/100/1000 MAC digital IP cores have been production-proven and can be licensed immediately with design kits; the test chip of 90nm PHY is expected to be available in February 2007.




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