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SiP begins challenging SoC implementations

Posted: 28 Nov 2006     Print Version  Bookmark and Share

Keywords:Wireless Communications Alliance  WCA  wireless  SoC  SiP 

system-in-package (SiP) technology has begun to challenge SoC implementations as a high-level design strategy for selected wireless applications because of lengthening SoC design cycles and other factors.

Speaking at a meeting of the Wireless Communications Alliance (WCA), three representatives of chip design houses specialising respectively in Wi-Fi, UWB and WiMAX noted that the SoC vs. SiP decision is still a difficult one.

But as many of SiP's manufacturing and design-tool are being resolved, it is becoming a viable option in cases were a quick development cycle is needed, an advanced IC process technology node is to be utilised, when the system integrates multiple radios or when the protocol to be instantiated in silicon has not had its final standards vote.

Winston Sun, a senior member of the technical staff at Wi-Fi chip vendor Atheros Communications, said that design cost and development time of SoC technology tends to rise exponentially as design complexity increases. On the other hand, cost and development time track more or less linearly with design complexity with SiP technology.

The availability of SiP design tools that address the specific problems wireless design, in the past, presented difficulties. But new, more application-specific tools are coming on the market.

Rajeev Krisnamoorthy, founder and CTO of Tzero Technologies, a chip house specialising in UWB, said that his company opted to implement its first product, a chip set for a wireless HDMI dongle that uses UWB for transport, as two separate chips on a motherboard. But no decision between the two packaging technologies has been made for future products.

According to Krisnamoorthy, the application is critical because as more and more radios are integrated into a system the decision becomes more of a "reusable IP" versus "reusable die" decision.

One aspect of the decision that the panelists agreed upon is that the respective "sweet spots" of analogue and digital process technology are seldom the same, particularly as the digital process technology moves into 65nm and beyond.

When performance of the analogue transceiver must attain high levels, the process technology choice alone could tilt the decision in favour of SiP. Another factor favouring SiP technology is that so-called "single-chip" solution invariably involves as many as eight passive components such as crystals, power amplifiers and filters.

Integrating these devices into a single package as opposed to soldering to a motherboard could reap benefits in terms of reliability. It would also be popular with systems houses that want the simplest solution possible because it would make motherboard design that much easier.

Aditya Agrawal of Beceem Communications, a WiMAX chip design house, noted that "there has been a lot of progress in SiP manufacturing," and that with SiP technology becoming more mature, it may be the next logical step to combine the RF and baseband chips in a package rather than on the motherboard.

- Jack Shandle
Wireless Net DesignLine




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