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Sequence intros first RTL power analysis solution

Posted: 20 Jul 2006     Print Version  Bookmark and Share

Keywords:Sequence Design  PowerTheater 65  RTL power analysis  SoC power-design 

Sequence Design's silicon-aware PowerTheater 65, the industry's first RTL power analysis and management solution with physical-design addresses the complex issues of low-power design at 65nm and below to insure results that closely relate to real silicon.

"The stakes are being raised at 65nm," said Sequence Design President and CEO Vic Kulkarni. "We have been working closely with key customers around the world to understand and address mission-critical issues of power management as they shift their designs from 130nm to 90nm, and then to 65nm."

According to the press release, PowerTheater 65 addresses SoC power-design challenges and speeds time to market for even the largest, most complex designs by offering early and accurate power analysis. The solution enhances its singular ability to accurately estimate power at RTL with silicon-aware features for voltage islands, mixed voltage threshold, power gating and clock gating. It saves up to 25 per cent of total clock power with increasingly silicon-aware, accurate prediction of the effects of clock gating on a design, and reports are available for multiple clocks or by clock domain, including clock networks and associated logic, added Sequence Design.

The PowerTheater 65 supports mixed RTL and gate power verification, as well as modal power analysis at both RTL and gate level. This solution now accepts RTL simulation vectors (VCD and FSDB) for gate-level power analysis. It promotes fast and compact RTL simulation with modal analysis to exercise power during all modes of operation. Designers can examine a much wider set of stimuli without requiring unwieldy gate-level VCD files that are time consuming to generate, promoting worst-case power analysis.

PowerTheater 65 is already available. North America list price begins at Rs.52.70 lakh ($1,15,000) for a 1-year TBL.




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