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Pixel innovations boost cellphone cams

Posted: 01 Dec 2005     Print Version  Bookmark and Share

Keywords:camera  cellphones  image sensor  digital-still-camera  DSC 

As camera capability becomes less of a novelty in cellphones, image quality will shift from aftermarket concern to selling point. This could spell trouble for handset designers.

The extreme space, power and cost constraints of the handset environment have kept the image quality of handset image sensors well below that of their digital-still-camera (DSC) counterparts. Those same constraints have limited the code space and processing power that a handset designer can devote to post capture image processing, the stage where most of the perceived image quality is created.

The problem is not simply a matter of resolution. Resolution of handset sensors has already passed the 1Mpixel level and is rapidly headed for 3Mpixels. There are difficulties in areas that are much harder to resolve, such as light sensitivity, systematic and random noise and colour correction. Small size and low energy consumption aggravate those problems. Incorporating automatic flash illumination into the handset can help, but that has implications for computing power, battery drain and enclosure design.

This state of affairs underscores the importance of a recent series of innovations at Agilent Technologies Inc. The almost coincidental discovery of a physical principle, a very careful job of physical design and the application of image-processing experience combined to yield an integrated image sensor and processor chip that could be a significant step toward solving the image-quality problem.

According to Agilent product line manager Sanjeev Chandrashekher, the story began in a series of research experiments. Agilent researchers had observed that in 1Mpixel sensors small enough to be embedded in a handset camera module, the individual pixels were so small that the optical aperture above each pixel was approaching an untenable threshold. Designers throw up their hands when the aperture gets below about 25m.

The research team created a series of pixel architectures based on a trapezoidal well shape in which they moved the metal lines around to measure the effect of the interconnect metal lines obscuring the edges of the aperture. To their surprise, they found that when the metal lines covered up a certain portion of the edges of the well, the charge generation in the well increased. Further work determined that the metal lines manipulated the electric field in the optical pathi.e. they behaved as a tertiary lens, gathering in light that would have fallen outside the well and focusing it toward the phototransistor. The researchers learned that the effect could be optimized to improve the sensitivity of the CMOS sensor pixel.

That unexpected result was combined with engineering projects that were exploring new geometries for the dopant well and the array layout. Those resulted in lower dark current, lower temporal noise and the ability to flush the charge more quickly from the well, thus reducing the image lag effects that harm image quality during high-repetition-rate image capture, such as in video applications.

Marketing manager Feisal Mosleh said that hard work also went into the pixel-processing pipeline that cleaned up the raw data received from the sensor. Working with what is essentially a 180nm logic process with extensions, the Agilent team was able to integrate a number of hardwired processing pipes, providing not only basic pixel cleanup, but also useful image-processing features.

"We've focused on closely coupling the design teams for the sensor and processing pipe," Mosleh said. "The pipeline has to be crafted to work with the strengths and compensate for the weaknesses of a particular sensor array design. You can't just copy a data path from a DSC intended for a big, expensive sensor and still get good images out the other end."

But neither can you stop with just a stream of pixels corrected for spatial noise. Good perceived image quality requires additional image processing to correct focusif the module is to have a focusing lensand to attempt to correct colour balance. The Agilent designers found room for both auto focus circuits and a block that categorizes the source of illumination in the image and applies a colour-correction filter. While not up to still-camera quality, the results in demonstration images are noticeable.

Finally, there is the matter of compression. JPEG is necessary if more than a few images are to reside in a handset at any one time. Current-generation baseband SoCs are not generally equipped with JPEG engines, but putting the processing load on the SoC's CPU core taxes time, battery life and code flash. So the Agilent designers squeezed a JPEG engine onto their sensor. "As far as I know, it's the only 1/3-inch sensor chip with on-chip JPEG," Mosleh said. In typical operating modes, the chip stays under 10mW.

Looking into the near future, the image is far from clear. "It may be that at 3-5Mpixels, everyone will have to separate the sensor substrate from the processing pipeline," Chandrashekher said. That would raise a number of issues. One is the added energy consumed by the chip crossing as data passes from the sensor die to the pipeline die. Another is physical configuration.

Although the handset market has pioneered the use of stacked-dice packaging, that approach is impractical in compact camera modules, Mosleh said. "The way the camera modules are mounted in handsets, they impact the thickness of the handset, which has become a major selling point. There just isn't the height available for a stacked package."

Cost is also an issue. "Modules are selling for about Rs.410.85 ($9)," Mosleh lamented. "The sensor chip consumes about half of that cost already, so there is no slack."

Thus, even the remarkable achievements of this design team may be short-lived in the market. But they could change the dynamics of the compact camera module business at the 1Mpixel level.

- Ron Wilson
EE Times




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