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Design, manufacturing worlds collide at Bacus

Posted: 11 Oct 2005     Print Version  Bookmark and Share

Keywords:bacus  ic design  ic manufacturing  photomask  lithography 

If there was a shred of doubt remaining about the magnitude at which IC design and manufacturing convergence is taking place, it was laid to rest last week (Oct. 3-7) at the 25th annual Bacus Photomask Technology symposium in Monterey, Calif.

Traditionally a gathering for a small group of mask-makers and lithographers, Bacus, organized annually by SPIE—The International Society for Optical Engineering, has seen the heightened focus on design-for-manufacturing (DFM) broaden the conference's appeal for EDA vendors and fabless semiconductor companies.

Preliminary attendance figures show that 1,154 attended the conference and exhibition, almost 200 more than the previous record. The technical conference portion of the event featured nearly 200 paper presentations, including an entire session on DFM and two sessions on resolution enhancement technology (RET).

While industry insiders disagree about what exactly DFM is and where exactly it needs to be implemented, all agree that the underlying issues fueling the DFM craze pose a serious threat to the industry. According to Bacus attendees, the conference's significance is increasing because mask-making is the place where design and manufacturing collide.

"We are used to being the middle man between design and manufacturing," said Franklin Kalk, chief technology officer of Toppan Photomasks Inc., which until being acquired by Toppan Printing Co. in April was DuPont Photomask Inc. Kalk added that the role of a photomask supplier has always been to bridge, and sometimes mediate between, the two worlds.

But that role is now more important—and under more scrutiny—than ever, according to Wolf Staud, product manager of RET Solutions for DFM at Cadence Design Systems Inc. Staud, who is also current president of Bacus, said the conference highlights a "great danger" facing the industry and that lithography has been the biggest productivity bottleneck for several years. While lithography scanner performance has caught up, he said, photomasks have become the focus of the problem.

Staud, a former Photronics executive, attributed the increased attendance at Bacus partially to fabless semiconductor companies, who he said are taking an increased interest in the photomask industry. While some integrated device manufacturers (IDMs) are turning to captive photomask making to gain greater control of the process, he said, fabless companies want to stay in step with photomask technology and on top of their photomask suppliers and are adding lithography and photomask experts to their payrolls.

"Fabless companies are petrified that IDMs with captive mask shops will have the advantage," Staud said.

"Fabless companies are coming to Bacus for risk mitigation and risk management," said Mark Miller, vice president of business development for DFM at Cadence.

Cadence's presence at Bacus underscores another trend. Five years ago, EDA companies did not even exhibit at Bacus. For the past few years, Cadence and rivals Synopsys Inc. and Mentor Graphics Corp. have not only exhibited, but been among the event's sponsors. EDA companies have established a presence at Bacus and in some respects are vying with equipment suppliers to provide the solution to low yields caused by systematic defects and problems with RET implementation.

"The line has really blurred," said Gary Smith, chief EDA analyst at Gartner Dataquest. "The lithography part of the process is pretty much being taken over by EDA companies. They are now supplying the RET tools."

Brion Technologies and KLA-Tencor Corp. each announced technologies Tuesday that attack RET inspection problems with hardware, post-tapeout. Brion's Focus Exposure Modeling (FEM) system full-chip, full-process-window lithography simulation technology that runs on the company's Tachyon hardware-accelerated simulation engine. KLA-Tencor's DesignScan is a full-chip process window inspection system for post-RET reticle design layout inspection.

Both tools promise the capability to identify potential RET problems prior to mask production. But both also require that a completed design be sent back to the design team to address the problems.

"Even if that model exists within the fab, it had better not find much," Staud said, adding that finding major problems with a design at that stage could mean two-to-three months of additional work and may cause a company to miss its market window.

Cadence and the other EDA companies, meanwhile, are talking about the need for "lithography-aware design" and pushing RET implementation upstream.

Miller said Cadence is working on technology to enable RET implementation earlier in the design process. The company is also working on visualization and simulation technologies that would give designers insight into potential problems as early as the layout implementation stage, allowing them to ensure the viability of a design, including RET, prior to tapeout, he said.

Miller likened the current focus on DFM with static timing analysis in the early 1980s. At the time, he said, designers would run static timing analysis just prior to tapeout. When designs got more complicated, that practice became too time consuming and inefficient, he said, and eventually EDA companies addressed the problem by offering technologies to assess timing earlier, and more often, in the process. Cadence, Miller said, would take a similar approach to DFM by providing technology and education to enable designers to implement designs with "lithography sensitivity" and the capability to check them early and often.

"Good EDA tools make hard, complex problems easier to deal with," Miller said. "That's our charge."

One key to this type of approach, according to Miller and other Bacus attendees, is that the solution cannot be too complicated. Nobody is expecting designers to become experts in lithography.

According to Dinesh Bettadapur, president and CEO of ASML MaskTools, which operates an RET joint development agreement with Cadence, the successful approach would provide designers with simple solutions that are presented in the context that designers are used to.

"There needs to be a consistent set of models and data that flows through the entire process," Bettadapur said.

- Dylan McGrath

EE Times





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