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1kW Class-E 13.56MHz single device RF generator for industrial applications

Posted: 07 Sep 2001     Print Version  Bookmark and Share

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Doc. #9300-0001 Rev 1 ) 2000 Directed Energy, Inc. All Rights Reserved 1KW CLASS-E 13.56MHz SINGLE DEVICE RF GENERATOR for INDUSTRIAL APPLICATIONS George J. Krausse, Directed Energy, Inc. Abstract There are a large variety of industrial processes that require reliable, low cost, regulated RF power. RF generators are well suited to these applications because of their high efficiency, high reliability and low system cost. The DE-SERIES POWER MOSFETs are ideally suited to RF generator applications. Fast switching speed combined with low parasitic capacitances, low on resistance and low thermal resistance allows them to dramatically outperform all competing MOSFET devices. This application note discusses the theory of operation and circuit design of the Class-E generator using DEI DE-SERIES MOSFETS. . 2401 Research Blvd. Suite 108 Fort Collins, CO USA 80526 TEL (970) 493-1901 FAX (970) 493-1903 EMAIL: deiinfo@directedenergy.com www.directedenergy.com D I R E C T E D E N E R G Y , I N C . A P P L I C A T I O N N O T E Directed Energy, Inc. An IXYS Company Doc. #9300-0001 Rev 1 Page 1 TABLE OF CONTENTS INTRODUCTION............................................................................................................. 2 THE CLASS E RF GENERATOR................................................................................... 3 Theory of Operation.............................................................................................................. 3 Calculating Class-E Element Values ................................................................................... 4 SPICE MODEL ............................................................................................................... 5 PROTOTYPE CIRCUIT................................................................................................... 6 FPS-4N Gate Drive ................................................................................................................ 7 PROTOTYPE CIRCUIT PERFORMANCE AND SPICE ................................................. 9 POWER MANAGEMENT.............................................................................................. 12 Power Measurement............................................................................................................12 Control..................................................................................................................................12 Protection.............................................................................................................................12 CONCLUSION .............................................................................................................. 13 REFERENCES.............................................................................................................. 14 APPENDIX.................................................................................................................... 15 Spice Model..........................................................................................................................15 RF Data.................................................................................................................................16 Doc. #9300-0001 Rev 1 Page 2 INTRODUCTION There are a large variety of industrial processes that require reliable, low cost, regulated RF power. Applications include RF plasma processing of silicon and gallium arsenide wafers, induction heating, glass and lens coating, plastic forming and industrial laser power supplies, to name a few. In the past this high power RF was provided by RF amplifiers. More recently the RF generator has displaced the RF amplifier in this field. The RF generator is a non-linear system in which the RF power output is produced at very high efficiency. The efficiency in a typical 1kW RF generator can reach 90%. This is accomplished by operating the power device as a saturated switch. This is considerably different from the linear power amplifier, where the power device is operated in the linear mode, and the efficiency can reach 65%. These two parameters, mode of operation and system efficiency, are the key distinctions between RF power amplifiers and RF power generators. The RF generator is well suited to industrial applications because of its high efficiency. This high efficiency brings with it the added benefit of fewer components, therefore potentially higher reliability and lowered system cost (1, 2, 3). The DE-SERIES POWER MOSFETs are ideally suited to RF generator applications. Fast switching speed combined with low parasitic capacitances, low on resistance and low thermal resistance allows them to dramatically outperform all competing MOSFET devices. (4) In this application note we will discuss the theory of operation and circuit design of the Class-E generator using DE-SERIES MOSFETs. A SPICE circuit model and device model will be developed to aid in the design phase, and the results will be bench tested and those results will be compared to the SPICE model output. The SPICE model will then be adjusted to reflect the performance of the prototype circuit. We will also explore circuit protection as well as power measurement and control. Doc. #9300-0001 Rev 1 Page 3 THE CLASS E RF GENERATOR Theory of Operation A typical Class E power amplifier is a single-ended switch-mode topology, one active device and an output series resonant, tuned load principals network as shown in Figure 1. +Vin FPS-4N Gate Drive Q1 DE-375 102N10A 1 23 L1 12uH 12 C1 .5UF 500V L2 1100nH 1 2 C4 190pF 1KV RLOAD 12.5 C6 177pF 3.5KV Figure 1 Class E circuit The active device should have high speed turn "on" and "off" characteristics, low "on" resistance and low COSS and CRSS, such that it can be an effective low loss switch in its saturated mode of operation. The resonant load network is designed so that its transient response reduces the power dissipation in the active device during the switching intervals. Vds Ids Vgs T0 T1 T2 T3 Figure 2 Class E Waveforms Referring to Figure 2, in an ideal Class E circuit, during the "off" state of the active device, the current drain remains at zero while the voltage across the device, Vds, increases to a maximum of 3.5 (Duty Cycle=50%) times Vcc (T0-T1). At the end of the"off" cycle (T1), the voltage across the active device has decreased to zero. At (T1) Vgs is applied and the current through the active device increases toward a maximum of approximately 2.86 times Idc. At the end of the "on" state (T2) the gate drive, Vgs is removed and the current drops to zero before the voltage begins to rise. In principle, Doc. #9300-0001 Rev 1 Page 4 there is no appreciable current flowing while drain voltage is present across the device and likewise there is no appreciable voltage across the device while drain current is flowing through the device. During switching transitions, both current and voltage have zero crossover values. With switching losses reduced in the manner just described, the only loss remaining is conduction. The ideal efficiency in a high power Class E amplifier can approach 90%. Increased efficiency not only means lower input power to the amplifier, but more importantly less heat dissipation in the active device. In Figure 1, the resonant load network consists of four passive elements Cshunt , Cseries , Lseries , and the effective load resistance R. The values of these four elements are chosen such that the resonant frequency and Q produce the ideal waveforms shown in Figure 2. LRF CHOKE, shown in Figure 1, is essentially a high impedance. Its value should be sufficiently high so as to act as a constant current source to the resonant circuit. The value of the effective load resistance R is a function of the desired RF output power and the applied DC voltage. The Q of the resonant circuit is dependent on the following factors: 1) the relative importance of the harmonic frequency delivered to the effective load resistance, and 2) the transient response of the voltage and current waveforms across the active device. If the Q is too low, the voltage across the active device does not discharge to zero prior to the device turning on. Too high of a Q and the voltage across the device discharges too quickly and possibly even swings negative. Calculating Class-E Element Values Given that the desired RF output power, the frequency of operation and the DC power supply voltage are know, then assuming a value for the loaded Q of the resonant load network, we can calculate the values of the Class E resonant elements. The derivation of these equations is beyond the scope of this paper and the reader should refer to the references for more details regarding the origin of the equations. We at DEI select the value of R as follows: In order to maximize efficiency we let: 10RR )ON(DS W= The three component values in the resonant output network can now be calculated as follows. The series inductor Lseries , can be found from: F2 R QLseries WW W= The equation for the series capacitor Cseries is given as: RQF2 Q 1 1 Cseries WWWW + = The shunt capacitor across the active switch Cshunt is found as: 3.6 Q CC seriesshunt W= Doc. #9300-0001 Rev 1 Page 5 The calculated value of Cshunt is the total value of the capacitance across the active device, which means the value of COSS of the active device should be subtracted from the value calculated for Cshunt. The value of the output capacitance of the active device is a voltage dependent variable, and it is sometimes difficult to choose an exact value to subtract from Cshunt without the aid of SPICE or in some cases empirically. All of the values calculated above are for ideal components, and do not take into consideration the parasitic effects, the unloaded Q of the individual components, or the network layout. These effects will either increase or decrease the calculated values depending on whether the parasitic effects are in series or parallel with the calculated element. From the two equations above for calculating the capacitors Cseries and Cshunt, it can be seen that both equations are a function of Q. The designer may decide to vary the chosen value of Q a few tenths higher of lower to achieve standard capacitor values. Let: F=13.56Mhz Q=7 R=12.5 Using the equations above and these three terms yields the following: LSERIES=1030nH CSERIES=153pF CSHUNT=170pF For the purposes of this article, we will use the DE-375 102N10A MOSFET. The device specifications are available on the DEI web site, www.directedenergy.com. The power MOSFET SPICE model for the DE-375-102N10A includes all strays, capacitive and inductive, and their voltage dependencies. SPICE MODEL Figure 3 SPICE Circuit Model The Class-E SPICE model is shown in Figure 3. In the model, DC power is supplied by the voltage source V2 PULSE, and the DC current is monitored at I(V2). R4 represents Doc. #9300-0001 Rev 1 Page 6 the resistive loss in the conductor of L2. Here L2 is sized so that at 13.56Mhz the XL is about 1000. The gate drive includes the source impedance of the FPS-4N gate driver and its loop inductance term. The current monitor I(V3) gives us the drain current. By returning the gate drive image currents as shown from V1 Pulse to the top of I(V3) we can eliminate their effect on the drain current waveform and reduce the busy nature of the display caused by this superimposition of the gate drive transients. First approximation values based on the preceding equations for all devices were installed in the SPICE model and prototype test circuit. The performance of both the test circuit and the SPICE model were evaluated. Each component was then optimized manually and the performance reevaluated. This process was repeated until the model included the appropriate component values and the correct strays. PROTOTYPE CIRCUIT +Vin FPS-4N Gate Drive FERRITE CORE 5961002701 2ea V=1 to 2 Z=1 to 4 N=6 25 Ohm Coax 25 Ohm Coax 12.5 Ohms Q1 DE-375 102N10A 1 23 L1 12uH 12 C1 .5UF 500V L2 1100nH 1 2 C4 190pF 1KV C6 177pF 3.5KV RLOAD 50 1 23 4 1 23 4 Figure 4 Prototype Test Circuit Schematic Figure 4 is a simplified schematic diagram of the test circuit. The 12.5 Class-E load resistance is provided by the 1:4 transmission line transformer shown. In all other respects the circuit of Figure 4 is identical with that of Figure 1. Doc. #9300-0001 Rev 1 Page 7 FPS-4N Gate Drive The gate driver for this article is the FPS-4N ( see Figure 5). The FPS-4N is a square wave driver with extremely low output impedance (typically 0.125), and series L term of about 1nH. The driver turn-on and off times are in the 3-5ns range with 3nF loads. In addition, the driver is capable of pulse width and frequency agility, from a minimum of about 10ns to DC. The maximum frequency is about 30MHz. This allows the gate drive to have less than 50% duty, which is key in achieving 90% efficiency. The driver and the design techniques used in its development are covered in great detail in the DEI gate driver design manual (5). Gerber files are also available at no charge for DE- SERIES users. Figure 5 FPS-4N Gate Driver Doc. #9300-0001 Rev 1 Page 8 Figure 6 Prototype Circuit The Prototype Circuit is shown in Figure 6. All support and high voltage power has been fed through common mode chokes (CMC), to reduce ground loops and improve the quality of the data. These CMC's are the pot-cores on the left side of the figure. The FPS-4N gate driver is shown in the center of the photograph. Just below the FPS-4N is the 13.56Mhz oscillator and TTL drive circuit. Above center is the 14uH RF choke and the 0.5uF by-pass capacitors. The Tektronix P5100 HV probe is in the lower center. The shunt capacitor, C4, is just to the left of the Tek probe tip. Further to the right is the series inductor and to the right of the inductor is the series capacitor. Just to the left of the BNC connector is the 1:4 transmission line transformer. The RF output at the right is applied to a Bird model 8329-300 attenuator through a Bird model 43 wattmeter via approximately 1 meter of 50 coaxial cable. The oscilloscope used for this application note was the Tektronix TDS-380 400MHz digital oscilloscope. The high voltage power supply is an Electronics Measurements Inc. model EMS-300-16 SMPS with voltage and current control. This type of high voltage supply is extremely well suited for power circuit development. The current control aspect allows the user to set a current limit thus offering some level of protection for the circuit under development. Doc. #9300-0001 Rev 1 Page 9 PROTOTYPE CIRCUIT PERFORMANCE AND SPICE Performance data for the optimized test circuit follows. Figure 7 Class E Gate Drive Waveform In Figure 7, we see the gate drive waveform. The +2V rise to +2V fall pulse width is 30ns and the peak value is approximately 10V. The frequency is 13.56Mhz. The loop inductance and ESR of the FPS-4N gate driver are extremely low. This, combined with the low gate lead inductance of the DE-SERIES devices, allow accurate views of the gate drive signal with or without HV power. Figure 8 SPICE Model Gate Drive Comparing Figure 7 to Figure 8 above we see that, with the exception of a less pronounced mid-value notch on the falling edge and 2ns in width, the two waveforms are in agreement. Doc. #9300-0001 Rev 1 Page 10 Figure 9 Class E Vds Waveform In Figure 9, we see the Vds waveform peaking at 808V. If we refer to Figure 2 we see that the drain waveform is very close to the classical ideal in that there is not a substantial voltage across the switch at commutation. In fact the drain voltage at turn on is 10% of the HV supply and 5% of the drain peak. This near zero drain voltage allows the switch Q1 to operate at near the theoretical maximum efficiency. The low drain lead inductance of the DE-SERIES and high frequency, high impedance voltage probes allow the accurate capture of the drain waveform. Figure 10 SPICE Model VDS Drain Waveform Comparing the 808V drain voltage peak of Figure 9 to Figure 10, we see that the spice model drain voltage peak is 740V. This yields a 9% error. Doc. #9300-0001 Rev 1 Page 11 Figure 11 RF Spectrum Of The Prototype Circuit Figure 11 illustrates the RF Spectrum of the prototype circuit into a 50 load. The second harmonic is 35db down from the fundamental and the third harmonic is about 53db down. The power output was measured at 1000W, using a Bird model 43 wattmeter. In Table 1, we show several parameters for both the SPICE model and the prototype circuit. Reconciling the errors there are several factors that we must keep in mind. The preceding calculations, which describe the three key component values for Class-E operation, are based on a 50% duty factor. The duty factor in this article is 46%. In addition, RF measurements are rarely better than 13% whereas the DC measurements when free from RF interference can be very precise. And the purpose of the SPICE model is to assist in the design and development phase, as well as to provide insight into the circuit performance, not provide exact results. Table 1 PARAMETER SPICE MODEL PROTOTYPE CIRCUIT SPICE to PROTO ERROR VDS PK 740V 808V -9% VS 290V 290V Set point IS 3.91 3.89 +.5% PO 1003 1000 +.3% EFF% 88.4% 88.6% +.2% For full data set see Appendix. At this point, we see a reasonable correlation between the SPICE model and the prototype test circuit. The DE-SERIES MOSFETS, (4) allow the shunt capacitors to be installed at the drain lead close enough to minimize the effect of lead inductance to the point of being inconsequential. In Figure 7, we see that there are 4 capacitors used to achieve the correct value of capacitance for C4. By placing capacitors of equal value on both sides of the drain PCB pad and attaching the other ends, on each side, to one of the two source pads, we provide two opposed and balanced current loops thus invoking Electro- Doc. #9300-0001 Rev 1 Page 12 Magnetic Symmetry. This, along with the two opposed and balanced current loops of the DE-SERIES device, give us a total of four significant and distinct, opposed and balanced current loops. This action reduces the net loop inductance substantially. POWER MANAGEMENT The load in industrial applications, unlike a 50 application, is often extremely dynamic, ranging in impedance from a fraction of an Ohm to several hundred Ohms. The problem is further compounded by the fact that often the process requires the generator to operate with large mismatches for at least a short period while the load or the load matching circuits stabilize. There is the additional requirement of very accurate power control. A high precision of absolute RF power is far less important than an extraordinarily high accuracy of reproducibility. We can explore these conditions in the SPICE model, then verify in the prototype circuit. Power Measurement The directional coupler is the device most often used to measure RF power. When the load is purely resistive and well matched, their accuracy and reproducibility are very good. However, this is often not the case with industrial type loads. These loads can often have highly reactive time, voltage, current or power varying components, which can produce extreme variations in system load impedance. This implies that until the load is matched, the power readings from a directional coupler will be inaccurate. Construction and performance information for several designs are found in the Radio Handbook (6) and the ARRL Handbook (7). An alternate method for power measurement is the direct measurement and multiplication of the RF current and voltage waveforms. However, this requires very accurate and stable current and voltage probes. It also requires an accurate high frequency multiplier. The Analog Devices AD834 is specified at < 1 .2db in flatness error (7). Control Power control in a single Class-E generator is accomplished in two ways. The first method and the most common is via the DC supply. We can vary this supply from a few volts to maximum and in so doing vary the RF power in the same way. The second and less common method is to vary the pulse width of the gate drive. Again, the output power will vary accordingly. However, the efficiency of the generator can be very adversely affected. Protection Using the SPICE model we can change the RLOAD from 12.5 to 1.25 then to 125 which corresponds to 50, 5 and 500 then observe which parameters change and by how much. Doc. #9300-0001 Rev 1 Page 13 TABLE 2 RLOAD Vds pk Ids pk Pout Pin Ploss Eff % REMARKS 1.25 923V 18.7A 187W 333W 146W 56% Low 12.5 808V 16.4A 1003W 1134W 131W 88.4% Normal 125 636V 32A 359W 1116W 757W 32% High In Table 2 we see the effects of load dynamics for a load change of a factor of 110. In the case of the High, the Ploss parameter is problematic, and at 757W into a device with only 340W dissipation capability, the device will be destroyed in a few milli- seconds. Therefore we must provide some immediate protection. In the Low circuit condition there again is only one parameter that is a problem, the Vds peak. At 923V, the device is too close to the VDS maximum. We changed the load on the prototype circuit to approximate Table 2. On power up we see that for both the Low and the High cases, the test circuit operation moves in the direction of the device failures as predicted by SPICE. CONCLUSION From the preceding we see that the Class-E RF generator can produce 1KW from a single DE SERIES MOSFET device with very high efficiency. Several of these stages can be combined to reach the multi-kilowatt level. The close alignment between the calculated values, the SPICE model and the prototype circuit is extremely helpful for circuit design and evaluation. It is recommended that the designer simulate the chosen active device, and the calculated values along with an estimation of the circuit parasitics, in a SPICE model. This technique allows the designer to understand how varying certain element values can lead to an optimum circuit configuration. Simulation of the circuit in SPICE will also allow the designer to monitor parameters such as the currents in the active device, and each of the network components, which cannot typically be monitored on the real hardware. These parameters can also help determine the dissipation and operating margins in each of the circuit elements. In addition, this allows the designer to vary parameters, load conditions and component strays, via SPICE, in order to synthesize the optimum circuit design for the application prior to spending time at the bench. The overall impact is to enhance the quality of engineering designs while reducing the time to market. The reference list includes two patents involving Class-E operation (1, 2). Patent # 3,919,656 (1), is the original patent. It covers the theory of operation and expired in 1993. The second, patent # 5,187,580 (2), focuses on a specific sub-optimum mode of operation by design. The circuit designer should become familiar with both texts prior to circuit design and implementation. Doc. #9300-0001 Rev 1 Page 14 REFERENCES 1. High-Efficiency Tuned Switching Power Amplifier Patent # 3,919.656 2. High Power Switch-Mode Radio Frequency Amplifier Method and Apparatus Patent # 5,187,580 3. Solid State Radio Engineering, Krauss, Bostian and Raab, CH 14. Wiley 1980 4. An Introduction to the DE-SERIES MOSFET, George J Krausse, Directed Energy, Inc. (DEI) www.directedenergy.com 5. Gate Driver Design For Switch-mode Applications and the DE-SERIES MOSFET, George J Krausse, Directed Energy, Inc. (DEI) www.directedenergy.com 6. Radio Handbook, 23 Edition SAMS ISBN: 0-672-2242-0, ARRL Handbook 2000 7. Analog Devices Application note AN-212 (AD834) Doc. #9300-0001 Rev 1 Page 15 APPENDIX Spice Model *SPICE_NET *INCLUDE SM2SUB.LIB .SUBCKT 102N10A 10 20 30 * TERMINALS: D G S * 1000 Volt 10 Amp 1.0 ohm N-Channel Power MOSFET 11-04-1993 * NEW RF DIE Low RG and Low Ciss,Crss and Coss * REV.A GJK 05-23-00 M1 1 2 3 3 DMOS L=1U W=1U RON 5 6 0.5 DON 6 2 D1 ROF 5 7 .1 DOF 2 7 D1 D1CRS 2 8 D2 D2CRS 1 8 D2 CGS 2 3 3.0N RD 4 1 1.5 DCOS 3 1 D3 RDS 1 3 5.0MEG LS 3 30 .5N LD 10 4 1N LG 20 5 1N .MODEL DMOS NMOS (LEVEL=3 VTO=3.0 KP=3.8) .MODEL D1 D (IS=.5F CJO=1P BV=100 M=.5 VJ=.6 TT=1N) .MODEL D2 D (IS=.5F CJO=200P BV=1000 M=.3 VJ=.6 TT=400N RS=10M) .MODEL D3 D (IS=.5F CJO=400P BV=1000 M=.3 VJ=.4 TT=400N RS=10M) .ENDS .OPTION METHOD=GEAR RELTOL=0.0001 VNTOL=1E-3 ABSTOL=1E-3 .TRAN 1N 3U 2.801U 10N .VIEW TRAN V(3) -10 +20 .VIEW TRAN V(10) -300 +300 .VIEW TRAN V(12) 0 1000 .VIEW TRAN I(V2) -10 +10 .VIEW TRAN I(V1) -10 +10 .VIEW TRAN I(V3) -30 +30 *INCLUDE DIODE.LIB *ALIAS V(3)=VGS *ALIAS I(V2)=IVS *ALIAS V(10)=RFVOUT *ALIAS V(12)=VDS *ALIAS I(V1)=IGS *ALIAS I(V3)=IDS .PRINT TRAN V(3) I(V2) V(10) V(12) .PRINT TRAN I(V1) I(V3) R1 2 1 .125 L1 2 3 1NH L2 6 12 14.0UH V2 5 0 PULSE 0 290 0U .1U .1U 5U 100U C2 4 7 177PF L3 12 4 1080NH R2 7 10 .6 R4 6 5 .1 R5 8 9 .1 L4 9 0 1NH C4 12 8 190PF R6 10 0 12.5 X10 12 3 11 102N10A V3 11 0 DC 0 V1 1 11 PULSE 0 10 0N 2N 2N 23N 74N .END Doc. #9300-0001 Rev 1 Page 16 RF Data 09-14-00 102N10A DE-375 Class-E VDC IN IDC IN PIN POUT Eff % VDS PK 91V 1.37A 124.7W 100W 80.2 253V 126V 1.76A 221.8W 200W 90.2 350V 154V 2.10A 323.4W 300W 92.7 428V 180V 2.44A 439.2W 400W 91.1 500V 204V 2.76A 563.0W 500W 88.8 567V 223V 3.03A 675.7W 600W 88.8 620V 240V 3.26A 782.4W 700W 89.5 667V 257V 3.49A 896.9W 800W 89.2 714V 273V 3.71A 1012.8W 900W 88.8 759V 290V 3.89A 1128.1W 1000W 88.6 808V TEXT DATA +Vin FPS-4N Gate Drive FERRITE CORE 5961002701 2ea V=1 to 2 Z=1 to 4 N=6 25 Ohm Coax 25 Ohm Coax 12.5 Ohms Q1 DE-375 102N10A 1 23 L1 12uH 12 C1 .5UF 500V L2 1100nH 1 2 C4 190pF 1KV C6 177pF 3.5KV RLOAD 50 1 23 4 1 23 4 L2 =1100nH D=1.20in. L=1.10in. N=7 W=#10ga.




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