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Miscellaneous Design Tips and Facts

Posted: 28 May 2003     Print Version  Bookmark and Share

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/ARTICLES/2003MAY/A/2003MAY28_AMD_POW_AN03.PDF

)2002 Teccor Electronics AN1009 - 1 http://www.teccor.com

Thyristor Product Catalog +1 972-580-7777

9

Miscellaneous Design Tips and Facts

Introduction

This application note presents design tips and facts on the follow-

ing topics:

7 Relationship of IAV, IRMS, and IPK

7 dv/dt Definitions

7 Examples of gate terminations

7 Curves for Average Current at Various Conduction Angles

7 Double-exponential Impulse Waveform

7 Failure Modes of Thyristor

7 Characteristics Formulas for Phase Control Circuits

Relationship of IAV, IRMS, and IPK

Since a single rectifier or SCR passes current in one direction

only, it conducts for only half of each cycle of an AC sinewave.

The average current (IAV) then becomes half of the value deter-

mined for full-cycle conduction, and the RMS current (IRMS) is

equal to the square root of half the mean-square value for full-

cycle conduction or half the peak current (IPK). In terms of half-

cycle sinewave conduction (as in a single-phase half-wave cir-

cuit), the relationships of the rectifier currents can be shown as

follows:

IPK = p IAV = 3.14 IAV

IAV = (1/p) IPK = 0.32 IPK

IPK = 2 IRMS

IRMS = 0.5 IPK

IAV = (2/p) IRMS = 0.64 IRMS

IRMS = (p/2) IAV = 1.57 IAV

When two identically rated SCRs are connected inverse parallel

for full-wave operation, as shown in Figure AN1009.1, they can

handle 1.41 times the RMS current rating of either single SCR.

Therefore, the RMS value of two half sinewave current pulses in

one cycle is V2 times the RMS value of one such pulse per cycle.

Figure AN1009.1 SCR Anti-parallel Circuit

dv/dt Definitions

The rate-of-rise of voltage (dv/dt) of an exponential waveform is

63% of peak voltage (excluding any overshoots) divided by the

time at 63% minus 10% peak voltage. (Figure AN1009.2)

Exponential dv/dt = =

Resistor Capacitor circuit t = RC =

Resistor Capacitor circuit

Figure AN1009.2 Exponential dv/dt Waveform

The rate-of-rise of voltage (dv/dt) of a linear waveform is 80% of

peak voltage (excluding any overshoots) divided by the time at

90% minus 10% peak voltage. (Figure AN1009.3)

Linear dv/dt = =

Linear dv/dt = =

Figure AN1009.3 Linear dv/dt Waveform

0.63 VPK[ ]7 t2 t1-( )

t2 t1-( )

4 RC7 t3 t2-( )=

(Peak Value)

100%

0%

63%

t1 t2t0 t3

PercentofVoltage

Time

Numerical dv/dt

10%

0.8 VPK[ ]7 t2 t1-( )

0.9 VPK7 0.1 VPK7-[ ] t2 t1-( )

90%

0%

10%

t1 t2

t0

PercentofVoltage

Time

AN1009 Application Notes

http://www.teccor.com AN1009 - 2 )2002 Teccor Electronics

+1 972-580-7777 Thyristor Product Catalog

Examples of Gate Terminations

Primary Purpose

(1) Increase dv/dt capability

(2) Keep gate clamped to ensure VDRM

capability

(3) Lower tq time

Related Effect -- Raises the device latching

and holding current

Primary Purpose

(1) Increase dv/dt capability

(2) Remove high frequency noise

Related Effects

(1) Increases delay time

(2) Increases turn-on interval

(3) Lowers gate signal rise time

(4) Lowers di/dt capability

(5) Increases tq time

Primary Purpose

(1) Decrease DC gate sensitivity

(2) Decrease tq time

Related Effects

(1) Negative gate current increases holding

current and causes gate area to drop out of

conduction

(2) In pulse gating gate signal tail may

cause device to drop out of conduction

Primary Purpose -- Select frequency

Related Effects -- Unless circuit is

"damped," positive and negative gate current

may inhibit conduction or bring about spo-

radic anode current

Primary Purpose

(1) Supply reverse bias in off period

(2) Protect gate and gate supply for reverse

transients

(3) Lower tq time

Related Effects -- Isolates the gate if high

impedance signal source is used without

sustained diode current in the negative cycle

Primary Purpose -- Decrease threshold

sensitivity

Related Effects

(1) Affects gate signal rise time and di/dt

rating

(2) Isolates the gate

Primary Purpose -- Isolate gate circuit DC

component

Related Effects -- In narrow gate pulses

and low impedance sources, Igt followed by

reverse gate signals which may inhibit con-

duction

Curves for Average Current at Various

Conduction Angles

SCR maximum average current curves for various conduction

angles can be established using the factors for maximum aver-

age current at conduction angle of:

300 = 0.40 x Avg 1800

600 = 0.56 x Avg 1800

900 = 0.70 x Avg 1800

1200 = 0.84 x Avg 1800

The reason for different ratings is that the average current for

conduction angles less than 1800 is derated because of the

higher RMS current connected with high peak currents.

Note that maximum allowable case temperature (TC) remains the

same for each conduction angle curve but is established from

average current rating at 1800 conduction as given in the data

sheet for any particular device type. The maximum TC curve is

then derated down to the maximum junction (TJ). The curves

illustrated in Figure AN1009.4 are derated to 125 0C since the

maximum TJ for the non-sensitive SCR series is 125 0C.

Figure AN1009.4 Typical Curves for Average On-state Current at

Various Conduction Angles versus TC for a

SXX20L SCR

Zener

optional

0

80

85

90

95

100

105

110

115

120

125

0 2 4 6 8 10 12 14 16

Average On-state Current [IT(AV)] - Amps

MaximumAllowableCaseTemperature(TC)-0C

1800

900

300

600

1200

Current: Halfwave Sinusoidal

Load: Resistive or Inductive

Conduction Angle: As Given Below

Case Temperature: Measured as

Shown on Dimensional Drawings

Conduction Angle

7.2 10.8 12.85.1

Application Notes AN1009

)2002 Teccor Electronics AN1009 - 3 http://www.teccor.com

Thyristor Product Catalog +1 972-580-7777

Double-exponential Impulse Waveform

A double-exponential impulse waveform or waveshape of current

or voltage is designated by a combination of two numbers (tr/td or

tr x td 5s). The first number is an exponential rise time (tr) or wave

front and the second number is an exponential decay time (td) or

wave tail. The rise time (tr) is the maximum rise time permitted.

The decay time (td) is the minimum time permitted. Both the tr and

the td are in the same units of time, typically microseconds, des-

ignated at the end of the waveform description as defined by

ANSI/IEEE C62.1-1989.

The rise time (tr) of a current waveform is 1.25 times the time for

the current to increase from 10% to 90% of peak value. See Fig-

ure AN1009.5.

tr = Rise Time = 1.25 7 [tc - ta]

tr = 1.25 7 [t(0.9 IPK) - t(0.1 IPK)] = T1 - T0

The rise time (tr) of a voltage waveform is 1.67 times the time for

the voltage to increase from 30% to 90% of peak value. (Figure

AN1009.5)

tr = Rise Time = 1.67 7 [tc - tb]

tr = 1.67 7 [t(0.9 VPK) - t(0.3 VPK)] = T1 - T0

The decay time (td) of a waveform is the time from virtual zero

(10% of peak for current or 30% of peak for voltage) to the time

at which one-half (50%) of the peak value is reached on the wave

tail. (Figure AN1009.5)

Current Waveform td = Decay Time

= [t(0.5 IPK) - t(0.1 IPK)] = T2 - T0

Voltage Waveform td = Decay Time

= [t(0.5 VPK) - t(0.3 VPK)] = T2 - T0

Figure AN1009.5 Double-exponential Impulse Waveform

Failure Modes of Thyristor

Thyristor failures may be broadly classified as either degrading

or catastrophic. A degrading type of failure is defined as a

change in some characteristic which may or may not cause a cat-

astrophic failure, but could show up as a latent failure. Cata-

strophic failure is when a device exhibits a sudden change in

characteristic that renders it inoperable. To minimize degrading

and catastrophic failures, devices must be operated within maxi-

mum ratings at all times.

Degradation Failures

A significant change of on-state, gate, or switching characteris-

tics is quite rare. The most vulnerable characteristic is blocking

voltage. This type of degradation increases with rising operating

voltage and temperature levels.

Catastrophic Failures

A catastrophic failure can occur whenever the thyristor is oper-

ated beyond its published ratings. The most common failure

mode is an electrical short between the main terminals, although

a triac can fail in a half-wave condition. It is possible, but not

probable, that the resulting short-circuit current could melt the

internal parts of the device which could result in an open circuit.

Failure Causes

Most thyristor failures occur due to exceeding the maximum

operating ratings of the device. Overvoltage or overcurrent oper-

ations are the most probable cause for failure. Overvoltage fail-

ures may be due to excessive voltage transients or may also

occur if inadequate cooling allows the operating temperature to

rise above the maximum allowable junction temperature. Over-

current failures are generally caused by improper fusing or circuit

protection, surge current from load initiation, load abuse, or load

failure. Another common cause of device failure is incorrect han-

dling procedures used in the manufacturing process. Mechanical

damage in the form of excessive mounting torque and/or force

applied to the terminals or leads can transmit stresses to the

internal thyristor chip and cause cracks in the chip which may not

show up until the device is thermally cycled.

Prevention of Failures

Careful selection of the correct device for the application's oper-

ating parameters and environment will go a long way toward

extending the operating life of the thyristor. Good design practice

should also limit the maximum current through the main terminals

to 75% of the device rating. Correct mounting and forming of the

leads also help ensure against infant mortality and latent failures.

The two best ways to ensure long life of a thyristor is by proper

heat sink methods and correct voltage rating selection for worst

case conditions. Overheating, overvoltage, and surge currents

are the main killers of semiconductors.

Most Common Thyristor Failure Mode

When a thyristor is electrically or physically abused and fails either

by degradation or a catastrophic means, it will short (full-wave or

half-wave) as its normal failure mode. Rarely does it fail open

circuit. The circuit designer should add line breaks, fuses, over-

temperature interrupters or whatever is necessary to protect the

end user and property if a shorted or partially shorted thyristor

offers a safety hazard.

Virtual Start of Wavefront(Peak Value)

100%

90%

50%

0%

10%

30%

ta tbT0 tc T1 T2

Time

PercentofCurrentorVoltage

Decay = e - t

1.44 T2

AN1009 Application Notes

http://www.teccor.com AN1009 - 4 )2002 Teccor Electronics

+1 972-580-7777 Thyristor Product Catalog

Characteristics Formulas for Phase Control Circuits

NOTE: Angle alpha (a) is in radians.

Half-wave Resistive Load - Schematic

Full-wave Bridge - Schematic

Full-wave AC Switch Resistive Load - Schematic

Half-wave Resistive Load - Waveform

Full-wave Bridge - Waveform

Full-wave AC Switch Resistive Load - Waveform

Circuit

Name

Max Thyristor

Voltage

PRV

Max. Load

Voltage

Ed=Avg.

Ea=RMS

Load Voltage

with Delayed Firing

Max. Average Thyristor

or Rectifier Current

SCR Avg. Amps Cond. Period

Half-wave

Resistive

Load

1.4 ERMS EP 180

Full-wave

Bridge

1.4 ERMS EP 180

Full-wave

AC Switch

Resistive

Load

1.4 ERMS EP 180

Ed

EP

p

-------=

Ea

EP

2

-------=

Ed

EP

2p

------- 1 acos+( )=

Ea

EP

2 p

----------- p a-

1

2

--- 2sin a+

h x

f v=

EP

pR

--------

Ed

2EP

p

-----------= E

d

EP

2 p

----------- 1 acos+( )=

EP

pR

--------

Ea

EP

1.4

--------= Ea

EP

2p

----------- p a-

1

2

--- 2sin a+

h x

f v=

EP

pR

--------

ERMS LoadR

E

Load

R

L

ERMS Load

R

0

EP

0

EP

0

EP





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